PONGSAKORN SIHAPITAK
Ph.D. candidate, 2nd year
Information Device Science Laboratory
Graduate School of Materials Science
Nara Institute of Science and Technology
8916-5 Takayama, Ikoma, Nara 630-0192, JAPAN

Tel: +81-743-72-6064
Fax: +81-743-72-6069


Biography

2021.10 - present PhD, Division of Materials Science, Nara Institute of Science and Technology, JAPAN
2021.4 - 2019.9 Research student, Division of Materials Science, Nara Institute of Science and Technology, JAPAN
2018.10 - 2020.9 M. Sc, Master's of Engineering, Division of Materials Science, Nara Institute of Science and Technology, JAPAN
2014.8 - 2018.5 Bachelor of Engineering, Department of Materials Engineering, Faculty of Engineering, Kasetsart University, THAILAND
2012.5 - 2014.3 Assumption college, THAILAND


Honors and Grants
2021 Student Paper Award, 27th International Workshop on Active-Matrix Flatpanel Displays and Devices, AM-FPD 20, JAPAN.


Publications

Presented Works

International conferences
P. Sihapitak, Y. Ishikawa, X. Wang, M. Uenuma, and Y. Uraoka,
“Effects of phase mask design on three-dimension nanostructure fabrication (13a-PB3-8)”,
The 67th Japan Society of Applied Physics Spring Meeting, Tokyo, JAPAN, 2020.


P. Sihapitak, Y. Ishikawa, X. Wang, M. Uenuma, and Y. Uraoka,
“Relationship of phase shift mask design and size of three-dimension nanostructure (P-4)”,
The 27th International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD 20), Kyoto, JAPAN, 2018.

P. Sihapitak, J. P. S. Bermundo, and Y. Uraoka,
“Study of bottom-gate top-contact source-gated transistor for performance enhancement through deivce simulation (25p-E202-5)”,
The 69th Japan Society of Applied Physics Spring Meeting, Kanagawa, JAPAN, 2022.

P. Sihapitak, J. P. S. Bermundo, and Y. Uraoka,
“Study of double-injection work function source-gated transistor for performance enhancement through device simulation”,
The 17th International Thin-Film Transistor Conference, Surrey, ENGLAND, 2022.

P. Sihapitak, J. P. S. Bermundo, and Y. Uraoka,
“Study of souce-gated transistor (SGT) for output current enhancement through TCAD simulation”,
The Society for Information Display Display Week 2023, Los Angeles, United State of America, 2023.

国内学会 (Japanese)



Conference Proceedings


P. Sihapitak, Y. Ishikawa, X. Wang, M. Uenuma, and Y. Uraoka,
“Relationship of phase shift mask design and size of three-dimension nanostructure”,
In the 27th International Workshop on Active-Matrix Flatpanel Displays and Devices, 2021, DOI: 10.23919/AM-FPD49417.2020.9224493.


Research Interests

Oxide Semiconductors, Schottky diodes, Source-gated transistor, Thin-film Transistors


Activities

The Japan Society of Applied Physics